Press Release
Baya Systems to Showcase Innovative SoC Strategies at Andes RISC-V CON Silicon Valley
SANTA CLARA, CA – April 28, 2025
Baya Systems, a leader in high-performance system architecture, will participate in the upcoming Andes RISC-V CON Silicon Valley, presenting groundbreaking approaches to optimize performance for AI and edge workloads. Alongside Imagination Technologies and Andes Technology, Baya’s chief software architect, Dr. Eric Norige, and Imagination’s product management director, Pallavi Sharma, will host a session titled “Unleashing the Power of Heterogeneous Computing.”
This session will focus on optimizing heterogeneous system-on-chip (SoC) strategies by examining the interaction between CPU and GPU subsystems, emphasizing memory hierarchy, bandwidth allocation, and latency. Attendees will learn about architecture-level decisions that drive AI inference efficiency and frame rendering in edge environments. The session underscores the importance of early insights into the design process, aiming to enhance performance without over-engineering.
Key highlights include:
- Cache and Memory Hierarchy Analysis: Demonstrations using Baya’s CacheStudio™ software will allow developers to analyze and simulate cache architectures and optimize memory access.
- Platform-Agnostic Integration: The session will explore how CacheStudio facilitates the integration of Imagination GPU IP and Andes RISC-V cores to enhance development efficiency.
- AI and Graphics Use Cases: Live demonstrations will showcase real-time workloads illustrating reduced latency and power usage while optimizing throughput.
Pallavi Sharma remarked, “By combining our GPU expertise with system-level insights, we aim to empower developers to create efficient RISC-V platforms.”
The session is scheduled for Tuesday, April 29, 2025, from 3:30-4:30 PM PT at the DoubleTree by Hilton Hotel in San Jose, California. Registration is available through Eventbrite.
To learn more about Baya Systems, please visit bayasystems.com.
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